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Product: XO (Clock Oscillator)
Series: HD and HDL
Output: LVDS Logic Output
Selection Guide - Specifications
• HD Series (non-PLL): Ultra low phase noise and low jitter.
• RMS phase jitter (12 KHz ~ 20 MHz): <1 ps.
• -142 dBc/Hz at 100 KHz offset (155.520 MHz)
• HDL Series (PLL-based): Low Cost.
• Moderate Phase noise and jitter.
• -125 dBc/Hz at 10 KHz offset (155.520 MHz).
• Differential LVDS outputs.

HD and HDL Series Data Sheets: (by package and supply voltages)

Package Photo Product Series
 Supply
Voltage		 Freq. min.(MHz) Freq. max.(MHz) No. of pins or pads Package Size (mm) / Description  / Features
25HD5761 2.5 V 60 320 6 5x7x2.5, Tri-state on pad 1. Non-PLL based, 6 pad SMD.
RMS Phase jitter (12 KHz~20 MHz) < 1 ps.
-142 dBc/Hz at 100 KHz offset (for 155.520 MHz).
3HD5761 3.3 V 60 320 6 5x7x2.5, Tri-state on pad 1. Non-PLL based, 6 pad SMD.
RMS Phase jitter (12 KHz~20 MHz)   < 1 ps.
-142 dBc/Hz at 100 KHz offset (for 155.520 MHz).
3HDL5761 3.3 V 0.75 800 6 5x7x2.5, Tri-state on pad 1.
PLL based, 6 pad SMD. Low cost. Moderate phase noise. 
-125 dBc/Hz at 10 KHz offset for 155.520 MHz.
25HD5762 2.5 V 60 320 6 5x7x2.5, Tri-state on pad 2. Non-PLL based, 6 pad SMD.
RMS Phase jitter (12 KHz~20 MHz) < 1 ps.
-142 dBc/Hz at 100 KHz offset (for 155.520 MHz).
3HD5762 3.3 V 60 320 6 5x7x2.5, Tri-state on pad 2. Non-PLL based, 6 pad SMD.
RMS Phase jitter (12 KHz~20 MHz) < 1 ps.
-142 dBc/Hz at 100 KHz offset (for 155.520 MHz).
3HDL5762 3.3 V 0.75 800 6 5x72.5, Tri-state on pad 2. PLL based, 6 pad SMD.
Low cost. Moderate phase noise. 
-125 dBc/Hz at 10 KHz offset for 155.520 MHz.
25HD14 2.5 V 60 320 4 Full Size 4  pin DIP, non-PLL based.
RMS Phase jitter (12 KHz~20 MHz)  < 1 ps.
-142 dBc/Hz at 100 KHz offset (for 155.520 MHz).
3HD14 3.3 V 60 320 4 Full Size 4  pin DIP, non-PLL based.
RMS Phase jitter (12 KHz~20 MHz) < 1 ps.
-142 dBc/Hz at 100 KHz offset (for 155.520 MHz).
3HDL14 3.3 V 0.75 800 4 Full Size 4  pin DIP. PLL based, 6 pad SMD.
Low cost. Moderate phase noise. 
-125 dBc/Hz at 10 KHz offset for 155.520 MHz.
25HD24 2.5 V 60 320 4 Full Size 4  pin Gull Wing, non-PLL based.
RMS Phase jitter (12 KHz~20 MHz) < 1 ps.
-142 dBc/Hz at 100 KHz offset (for 155.520 MHz).
3HD24 3.3 V 60 320 4 Full Size 4  pin Gull Wing, non-PLL based.
RMS Phase jitter (12 KHz~20 MHz) < 1 ps.
-142 dBc/Hz at 100 KHz offset (for 155.520 MHz).
3HDL24 3.3 V 0.75 800 4 Full Size 4  pin Gull Wing SMD. PLL based, 6 pad SMD.
Low cost. Moderate phase noise. 
-125 dBc/Hz at 10 KHz offset for 155.520 MHz.
25HD8 2.5 V 60 320 4 Half Size 4  pin DIP, non-PLL based.
RMS Phase jitter (12 KHz~20 MHz) < 1 ps.
- 142 dBc/Hz at 100 KHz offset (for 155.520 MHz).
3HD8 3.3 V 60 320 4 Half Size 4  pin DIP, non-PLL based.
RMS Phase jitter (12 KHz~20 MHz) < 1 ps.
-142 dBc/Hz at 100 KHz offset (for 155.520 MHz).
3HDL8 3.3 V 0.75 800 4 Half Size 4  pin DIP. PLL based, 6 pad SMD.
Low cost. Moderate phase noise. 
-125 dBc/Hz at 10 KHz offset for 155.520 MHz.
25HD18 2.5 V 60 320 4 Half Size 4  pin Gull Wing,non-PLL based.
RMS Phase jitter (12 KHz~20 MHz) < 1 ps.
-142 dBc/Hz at 100 KHz offset (for 155.520 MHz).
3HD18 3.3 V 60 320 4 Half Size 4  pin Gull Wing, non-PLL based.
RMS Phase jitter (12 KHz~20 MHz) < 1 ps.
-142 dBc/Hz at 100 KHz offset (for 155.520 MHz).
3HDL18 3.3 V 0.75 800 4 Half Size 4  pin Gull Wing SMD.
PLL based, 6 pad SMD. Low cost. Moderate phase noise. 
-125 dBc/Hz at 10 KHz offset for 155.520 MHz.
25HD62 2.5 V 60 320 6 9.6x11.4x2.5 mm 6 pad SMD, non-PLL based.
RMS Phase jitter (12 KHz~20 MHz) < 1 ps.
-142 dBc/Hz at 100 KHz offset (for 155.520 MHz).
3HD62 3.3 V 60 320 6 9.6x11.4x2.5 mm 6 pad SMD, non-PLL based.
RMS Phase jitter (12 KHz~20 MHz) < 1 ps.
-142 dBc/Hz at 100 KHz offset (for 155.520 MHz).
3HDL62 3.3 V 0.75 800 6 9.6x11.4x2.5 mm 6 pad FR4 SMD.
PLL based, 6 pad SMD. Low cost. Moderate phase noise. 
-125 dBc/Hz at 10 KHz offset for 155.520 MHz.
25HD64 2.5 V 60 320 6 9.6x11.4x4.7 mm 6 pad SMD, non-PLL based.
RMS Phase jitter (12 KHz~20 MHz) < 1 ps.
-142 dBc/Hz at 100 KHz offset (for 155.520 MHz).
3HD64 3.3 V 60 320 6 9.6x11.4x4.7 mm 6 pad SMD, non-PLL based.
RMS Phase jitter (12 KHz~20 MHz) < 1 ps.
-142 dBc/Hz at 100 KHz offset (for 155.520 MHz).
3HDL64 3.3 V 0.75 800 6 9.6x11.4x4.7 mm 6 pad FR4 SMD.
PLL based, 6 pad SMD. Low cost. Moderate phase noise. 
-125 dBc/Hz at 10 KHz offset for 155.520 MHz.

General Specifications: HD Series
   TA=+25°C, VDD= at specified voltage, Load: 10 KΩ // 10 pF
Mercury Model HD and HDL
Frequency Range
(package dependent)		 60 MHz ~ 320 MHz. Non-PLL-based.
Output Logic Differential LVDS Square Wave

Frequency Stability (1)

Commercial (0°C to +70°C)
Temperature Code is "C"



Industrial (-40°C to +85°C)
Temperature Code is "I" 		Stability Code "A": ±25 ppm over 0°C to +70°C
Stability Code "B": ±50 ppm over 0°C to +70°C
Stability Code "C": ±100 ppm over 0°C to +70°C
If non-standard please enter the desired stability after the "C"
(e.g. C20 represents ±20 ppm over 0°C to +70°C)
Stability Code "D": ±25 ppm over -40°C to +85°C
Stability Code "E": ±50 ppm over -40°C to +85°C
Stability Code "F": ±100 ppm over -40°C to +85°C
If non-standard please enter the desired stability after the "I"
(e.g. I20 represents ±20 ppm over -40°C to +85°C)
vs ±10% Supply Voltage Change: ±3 ppm max.
vs ±10% Load Change: ±2 ppm max.
Supply Voltage (VDD) 3.3 V ± 10%
Output Voltage HIGH "1" VOH 1.4 V Typical; 1.6 V Max.
Output Voltage LOW "0" VOL 0.9 V min.; 1.1 V max.
Current Consumption (typical) 55 mA typical; 60 mA max. for 202.50 MHz
Load 50 Ω into VDD or Thevenin Equivalent.
(terminating resistors required on all outputs)
Rise Time (TR) and Fall Time (TF)

0.5 nano sec. typical; 0.7 nano sec. max
CL= 10 pF (20% ↔ 80%)

Duty Cycle 50% ± 5% max. measured at 1.25V
Phase Jitter (RMS)
(12 KHz to 20 MHz)		 1 ps max. ( 12 KHz to 20 MHz )
Phase Noise (RMS) typical 155.520 MHz 311.04 MHz 622.080MHz
typical max. typical max. typical max.
3 ps 5 ps 2 ps 3 ps 2.5 ps 4 ps
Phase Noise (Peak-to-Peak) 21 ps 30 ps 18 ps 20 ps 18 ps 20 ps
Accumulated Jitter (RMS) 5 ps 3 ps 4 ps
Phase Noise

(dBc/Hz)

(offset from carrier)		 10 Hz Offset -72 dBc/Hz -75 dBc/Hz -60 dBc/Hz
100 Hz Offset -100 dBc/Hz -105 dBc/Hz -92 dBc/Hz
1 KHz Offset -125 dBc/Hz -130 dBc/Hz -122 dBc/Hz
10 KHz Offset -132 dBc/Hz -140 dBc/Hz -140 dBc/Hz
100 KHz Offset -142 dBc/Hz -145 dBc/Hz -142 dBc/Hz
1 MHz Offset -147 dBc/Hz -150 dBc/Hz -146 dBc/Hz
10 MHz Offset -149 dBc/Hz -150 dBc/Hz -148 dBc/Hz
 
Start-up Time 5 m sec. typical; 10 m sec. max.
Aging ±2 ppm per year max.
Tristate Option on Pad No. 1 No Connection LVDS and complimentary LVDS outputs.
Disable Both outputs are disabled (high impedance) when pad No. 1 is taken below 0.3 Vcc referenced to ground.
Oscillator is always ON. Special request: Oscillator is off when disabled. Contact Mercury.
Enable At disabled mode, both outputs are enabled when pad No. 1 is taken above 0.7 Vcc referenced to ground.
Input Static Discharge Protection 2 KV max.
Absolute Maximum Rating (permanent damage may be created if operate beyond limits specified.
Supply Voltage VDD +4.6 V D.C. max.
Input Voltage Vi Vss-0.5V min.; VDD + 0.5V max.
Input Voltage Vo Vss-0.5V min.; VDD + 0.5V max.
Storage Temperature TS -55°C min.; +150°C max.
(1)Inclusive of 25°C tolerance, operating temperature range, ±10% input voltage variation, load change, aging, shock and vibration.
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